Вакансия в Интел - FPGA and ASIC engineer
Дата: 17.02.2022 11:40
Категория: Ищу сотрудников
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The Design Implementation for Customers using Structured ASIC technology (eASIC) Team within Intel's Programmable Solutions Group (PSG) is looking for a senior level ASIC Engineer.
As a senior level ASIC Engineer, you will interact with customers to collect information on RTL and IP and implement the customer code through synthesis, PnR, timing closure, and hand off layout database to the tape out team.
Qualifications:
- 5+ years of experience with RTL (Verilog, SystemVerilog, VHDL), Synthesis (using Design Compiler), Static Timing Analysis (using PrimeTime)
- Bachelor's Degree in Electrical Engineering, Computer Engineering or related field
- Synopsys Design Constraints for synthesis and timing signoff
Preferred Qualifications:
- 2+ years of experience using Spyglass including clock domain crossing (CDC) analysis
- Experience in Design Verification (DV) using standard simulators (e.g. VCS, QuestaSim, NCSim)
- Experience with Structured ASIC implementation design flow
Контактная информация:
- Яна Федоренко
- yana.fedorenko@intel.com
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